MC_RPB_TCI_CNTL__TCI_MAX_WRITES_MASK 3443 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_RPB_TCI_CNTL__TCI_MAX_WRITES_MASK 0xff0000
MC_RPB_TCI_CNTL__TCI_MAX_WRITES_MASK 3829 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_RPB_TCI_CNTL__TCI_MAX_WRITES_MASK 0xff0000
MC_RPB_TCI_CNTL__TCI_MAX_WRITES_MASK 3671 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h #define MC_RPB_TCI_CNTL__TCI_MAX_WRITES_MASK 0xff0000