MC_RPB_CID_QUEUE_WR__CLIENT_ID__SHIFT 7685 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_RPB_CID_QUEUE_WR__CLIENT_ID__SHIFT 0x00000000
MC_RPB_CID_QUEUE_WR__CLIENT_ID__SHIFT 2808 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h #define MC_RPB_CID_QUEUE_WR__CLIENT_ID__SHIFT 0x0
MC_RPB_CID_QUEUE_WR__CLIENT_ID__SHIFT 3390 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_RPB_CID_QUEUE_WR__CLIENT_ID__SHIFT 0x0
MC_RPB_CID_QUEUE_WR__CLIENT_ID__SHIFT 3776 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_RPB_CID_QUEUE_WR__CLIENT_ID__SHIFT 0x0
MC_RPB_CID_QUEUE_WR__CLIENT_ID__SHIFT 3618 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h #define MC_RPB_CID_QUEUE_WR__CLIENT_ID__SHIFT 0x0