MC_REGISTERS_TABLE_67__data_3_value_1__SHIFT 3414 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define MC_REGISTERS_TABLE_67__data_3_value_1__SHIFT 0x0
MC_REGISTERS_TABLE_67__data_3_value_1__SHIFT 3412 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define MC_REGISTERS_TABLE_67__data_3_value_1__SHIFT 0x0
MC_REGISTERS_TABLE_67__data_3_value_1__SHIFT 1434 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define MC_REGISTERS_TABLE_67__data_3_value_1__SHIFT 0x0
MC_REGISTERS_TABLE_67__data_3_value_1__SHIFT 3638 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define MC_REGISTERS_TABLE_67__data_3_value_1__SHIFT 0x0