MC_REGISTERS_TABLE_103__data_5_value_5_MASK 3485 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define MC_REGISTERS_TABLE_103__data_5_value_5_MASK 0xffffffff
MC_REGISTERS_TABLE_103__data_5_value_5_MASK 3483 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define MC_REGISTERS_TABLE_103__data_5_value_5_MASK 0xffffffff