MC_PHY_TIMING_D1__TXC0_EXT_MASK 7400 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_PHY_TIMING_D1__TXC0_EXT_MASK 0x00f00000L
MC_PHY_TIMING_D1__TXC0_EXT_MASK 9323 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_PHY_TIMING_D1__TXC0_EXT_MASK 0xf00000
MC_PHY_TIMING_D1__TXC0_EXT_MASK 10235 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_PHY_TIMING_D1__TXC0_EXT_MASK 0xf00000