MC_PHY_TIMING_D1__RXC1_DLY__SHIFT 7395 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_PHY_TIMING_D1__RXC1_DLY__SHIFT 0x00000008 MC_PHY_TIMING_D1__RXC1_DLY__SHIFT 9318 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_PHY_TIMING_D1__RXC1_DLY__SHIFT 0x8 MC_PHY_TIMING_D1__RXC1_DLY__SHIFT 10230 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_PHY_TIMING_D1__RXC1_DLY__SHIFT 0x8