MC_PHY_TIMING_D1__RXC0_DLY__SHIFT 7391 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_PHY_TIMING_D1__RXC0_DLY__SHIFT 0x00000000
MC_PHY_TIMING_D1__RXC0_DLY__SHIFT 9314 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_PHY_TIMING_D1__RXC0_DLY__SHIFT 0x0
MC_PHY_TIMING_D1__RXC0_DLY__SHIFT 10226 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_PHY_TIMING_D1__RXC0_DLY__SHIFT 0x0