MC_PHY_TIMING_2__ADR_CLKEN_D0__SHIFT 7347 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_PHY_TIMING_2__ADR_CLKEN_D0__SHIFT 0x00000012
MC_PHY_TIMING_2__ADR_CLKEN_D0__SHIFT 9352 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_PHY_TIMING_2__ADR_CLKEN_D0__SHIFT 0x12
MC_PHY_TIMING_2__ADR_CLKEN_D0__SHIFT 10264 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_PHY_TIMING_2__ADR_CLKEN_D0__SHIFT 0x12