MC_IO_TXCNTL_APHY_D1__TXBPASS_SEL__SHIFT 7179 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_IO_TXCNTL_APHY_D1__TXBPASS_SEL__SHIFT 0x0000000c
MC_IO_TXCNTL_APHY_D1__TXBPASS_SEL__SHIFT 7554 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_IO_TXCNTL_APHY_D1__TXBPASS_SEL__SHIFT 0xc
MC_IO_TXCNTL_APHY_D1__TXBPASS_SEL__SHIFT 8468 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_IO_TXCNTL_APHY_D1__TXBPASS_SEL__SHIFT 0xc