MC_IO_RXCNTL1_DPHY1_D1__VREFSEL3__SHIFT 6997 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_IO_RXCNTL1_DPHY1_D1__VREFSEL3__SHIFT 0x00000011
MC_IO_RXCNTL1_DPHY1_D1__VREFSEL3__SHIFT 7670 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_IO_RXCNTL1_DPHY1_D1__VREFSEL3__SHIFT 0x11
MC_IO_RXCNTL1_DPHY1_D1__VREFSEL3__SHIFT 8584 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_IO_RXCNTL1_DPHY1_D1__VREFSEL3__SHIFT 0x11