MC_IO_PAD_CNTL_D1__GDDR_PWRON_MASK 6900 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_IO_PAD_CNTL_D1__GDDR_PWRON_MASK 0x40000000L
MC_IO_PAD_CNTL_D1__GDDR_PWRON_MASK 8365 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_IO_PAD_CNTL_D1__GDDR_PWRON_MASK 0x40000000
MC_IO_PAD_CNTL_D1__GDDR_PWRON_MASK 9279 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_IO_PAD_CNTL_D1__GDDR_PWRON_MASK 0x40000000