MC_IO_CDRCNTL2_D0__WCK_RXEN_OVR1__SHIFT 2641 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_IO_CDRCNTL2_D0__WCK_RXEN_OVR1__SHIFT 0x00000007
MC_IO_CDRCNTL2_D0__WCK_RXEN_OVR1__SHIFT 7786 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_IO_CDRCNTL2_D0__WCK_RXEN_OVR1__SHIFT 0x7
MC_IO_CDRCNTL2_D0__WCK_RXEN_OVR1__SHIFT 8700 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_IO_CDRCNTL2_D0__WCK_RXEN_OVR1__SHIFT 0x7