MC_IMP_DQ_STATUS__CH1_DQ_PSTR__SHIFT 2569 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_IMP_DQ_STATUS__CH1_DQ_PSTR__SHIFT 0x00000010
MC_IMP_DQ_STATUS__CH1_DQ_PSTR__SHIFT 6810 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_IMP_DQ_STATUS__CH1_DQ_PSTR__SHIFT 0x10
MC_IMP_DQ_STATUS__CH1_DQ_PSTR__SHIFT 7724 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_IMP_DQ_STATUS__CH1_DQ_PSTR__SHIFT 0x10