MC_DLB_SETUP__MEM_BIT_SEL__SHIFT 14150 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_DLB_SETUP__MEM_BIT_SEL__SHIFT 0x18
MC_DLB_SETUP__MEM_BIT_SEL__SHIFT 15064 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_DLB_SETUP__MEM_BIT_SEL__SHIFT 0x18