MC_DLB_MISCCTRL0__UDD__SHIFT 14092 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_DLB_MISCCTRL0__UDD__SHIFT 0x10
MC_DLB_MISCCTRL0__UDD__SHIFT 15006 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_DLB_MISCCTRL0__UDD__SHIFT 0x10