MC_BIST_CMP_CNTL__EDC_STORE_SEL__SHIFT 1225 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_BIST_CMP_CNTL__EDC_STORE_SEL__SHIFT 0x0000000e
MC_BIST_CMP_CNTL__EDC_STORE_SEL__SHIFT 8498 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_BIST_CMP_CNTL__EDC_STORE_SEL__SHIFT 0xe
MC_BIST_CMP_CNTL__EDC_STORE_SEL__SHIFT 9412 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_BIST_CMP_CNTL__EDC_STORE_SEL__SHIFT 0xe