MC_BIST_CMD_CNTL__ENABLE_D0_MASK 1188 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_BIST_CMD_CNTL__ENABLE_D0_MASK 0x10000000L
MC_BIST_CMD_CNTL__ENABLE_D0_MASK 8401 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_BIST_CMD_CNTL__ENABLE_D0_MASK 0x10000000
MC_BIST_CMD_CNTL__ENABLE_D0_MASK 9315 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_BIST_CMD_CNTL__ENABLE_D0_MASK 0x10000000