MC_ARB_SQM_CNTL__SQM_RESERVE_MASK 1030 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_ARB_SQM_CNTL__SQM_RESERVE_MASK 0x0000fe00L
MC_ARB_SQM_CNTL__SQM_RESERVE_MASK  459 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h #define MC_ARB_SQM_CNTL__SQM_RESERVE_MASK 0xfc00
MC_ARB_SQM_CNTL__SQM_RESERVE_MASK  511 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_ARB_SQM_CNTL__SQM_RESERVE_MASK 0xfc00
MC_ARB_SQM_CNTL__SQM_RESERVE_MASK  555 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_ARB_SQM_CNTL__SQM_RESERVE_MASK 0xfc00
MC_ARB_SQM_CNTL__SQM_RESERVE_MASK  555 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h #define MC_ARB_SQM_CNTL__SQM_RESERVE_MASK 0xfc00