MC_ARB_PM_CNTL__OVRR_PM_STATE__SHIFT  843 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_ARB_PM_CNTL__OVRR_PM_STATE__SHIFT 0x00000008
MC_ARB_PM_CNTL__OVRR_PM_STATE__SHIFT  744 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h #define MC_ARB_PM_CNTL__OVRR_PM_STATE__SHIFT 0x8
MC_ARB_PM_CNTL__OVRR_PM_STATE__SHIFT  802 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_ARB_PM_CNTL__OVRR_PM_STATE__SHIFT 0x8
MC_ARB_PM_CNTL__OVRR_PM_STATE__SHIFT  848 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_ARB_PM_CNTL__OVRR_PM_STATE__SHIFT 0x8
MC_ARB_PM_CNTL__OVRR_PM_STATE__SHIFT  846 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h #define MC_ARB_PM_CNTL__OVRR_PM_STATE__SHIFT 0x8