MC_ARB_PM_CNTL__OVRR_CGRFSH_MASK  836 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_ARB_PM_CNTL__OVRR_CGRFSH_MASK 0x00000004L
MC_ARB_PM_CNTL__OVRR_CGRFSH_MASK  731 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h #define MC_ARB_PM_CNTL__OVRR_CGRFSH_MASK 0x4
MC_ARB_PM_CNTL__OVRR_CGRFSH_MASK  789 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_ARB_PM_CNTL__OVRR_CGRFSH_MASK 0x4
MC_ARB_PM_CNTL__OVRR_CGRFSH_MASK  835 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_ARB_PM_CNTL__OVRR_CGRFSH_MASK 0x4
MC_ARB_PM_CNTL__OVRR_CGRFSH_MASK  833 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h #define MC_ARB_PM_CNTL__OVRR_CGRFSH_MASK 0x4