MC_ARB_MAX_LAT_CID__CID_CH0_MASK  867 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h #define MC_ARB_MAX_LAT_CID__CID_CH0_MASK 0xff
MC_ARB_MAX_LAT_CID__CID_CH0_MASK  929 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_ARB_MAX_LAT_CID__CID_CH0_MASK 0xff
MC_ARB_MAX_LAT_CID__CID_CH0_MASK  981 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_ARB_MAX_LAT_CID__CID_CH0_MASK 0xff
MC_ARB_MAX_LAT_CID__CID_CH0_MASK  979 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h #define MC_ARB_MAX_LAT_CID__CID_CH0_MASK 0xff