MC_ARB_GECC2_STATUS__RSVD0__SHIFT  679 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_ARB_GECC2_STATUS__RSVD0__SHIFT 0x00000003
MC_ARB_GECC2_STATUS__RSVD0__SHIFT   96 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h #define MC_ARB_GECC2_STATUS__RSVD0__SHIFT 0x3
MC_ARB_GECC2_STATUS__RSVD0__SHIFT  124 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_ARB_GECC2_STATUS__RSVD0__SHIFT 0x3
MC_ARB_GECC2_STATUS__RSVD0__SHIFT  142 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_ARB_GECC2_STATUS__RSVD0__SHIFT 0x3
MC_ARB_GECC2_STATUS__RSVD0__SHIFT  142 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h #define MC_ARB_GECC2_STATUS__RSVD0__SHIFT 0x3