MC_ARB_GECC2_STATUS__CORR_STS1__SHIFT  669 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_ARB_GECC2_STATUS__CORR_STS1__SHIFT 0x00000004
MC_ARB_GECC2_STATUS__CORR_STS1__SHIFT   98 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h #define MC_ARB_GECC2_STATUS__CORR_STS1__SHIFT 0x4
MC_ARB_GECC2_STATUS__CORR_STS1__SHIFT  126 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_ARB_GECC2_STATUS__CORR_STS1__SHIFT 0x4
MC_ARB_GECC2_STATUS__CORR_STS1__SHIFT  144 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_ARB_GECC2_STATUS__CORR_STS1__SHIFT 0x4
MC_ARB_GECC2_STATUS__CORR_STS1__SHIFT  144 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h #define MC_ARB_GECC2_STATUS__CORR_STS1__SHIFT 0x4