MC_ARB_GECC2_STATUS__CORR_STS0__SHIFT  667 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define MC_ARB_GECC2_STATUS__CORR_STS0__SHIFT 0x00000000
MC_ARB_GECC2_STATUS__CORR_STS0__SHIFT   90 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h #define MC_ARB_GECC2_STATUS__CORR_STS0__SHIFT 0x0
MC_ARB_GECC2_STATUS__CORR_STS0__SHIFT  118 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_ARB_GECC2_STATUS__CORR_STS0__SHIFT 0x0
MC_ARB_GECC2_STATUS__CORR_STS0__SHIFT  136 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_ARB_GECC2_STATUS__CORR_STS0__SHIFT 0x0
MC_ARB_GECC2_STATUS__CORR_STS0__SHIFT  136 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h #define MC_ARB_GECC2_STATUS__CORR_STS0__SHIFT 0x0