MC_ARB_AGE_CNTL__RESET_WR_GROUP5__SHIFT   66 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h #define MC_ARB_AGE_CNTL__RESET_WR_GROUP5__SHIFT 0xd
MC_ARB_AGE_CNTL__RESET_WR_GROUP5__SHIFT   74 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_ARB_AGE_CNTL__RESET_WR_GROUP5__SHIFT 0xd
MC_ARB_AGE_CNTL__RESET_WR_GROUP5__SHIFT   86 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_ARB_AGE_CNTL__RESET_WR_GROUP5__SHIFT 0xd
MC_ARB_AGE_CNTL__RESET_WR_GROUP5__SHIFT   86 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h #define MC_ARB_AGE_CNTL__RESET_WR_GROUP5__SHIFT 0xd