MC_ARB_AGE_CNTL__RESET_RD_GROUP0__SHIFT   40 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h #define MC_ARB_AGE_CNTL__RESET_RD_GROUP0__SHIFT 0x0
MC_ARB_AGE_CNTL__RESET_RD_GROUP0__SHIFT   48 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define MC_ARB_AGE_CNTL__RESET_RD_GROUP0__SHIFT 0x0
MC_ARB_AGE_CNTL__RESET_RD_GROUP0__SHIFT   60 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MC_ARB_AGE_CNTL__RESET_RD_GROUP0__SHIFT 0x0
MC_ARB_AGE_CNTL__RESET_RD_GROUP0__SHIFT   60 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h #define MC_ARB_AGE_CNTL__RESET_RD_GROUP0__SHIFT 0x0