MCIF_WB_BUFMGR_SW_CONTROL__MCIF_WB_P_VMID_MASK 15469 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define MCIF_WB_BUFMGR_SW_CONTROL__MCIF_WB_P_VMID_MASK 0xf0000
MCIF_WB_BUFMGR_SW_CONTROL__MCIF_WB_P_VMID_MASK 7637 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h #define MCIF_WB_BUFMGR_SW_CONTROL__MCIF_WB_P_VMID_MASK 0xf0000