MCFSIM_DMR0        56 arch/m68k/include/asm/m5206sim.h #define	MCFSIM_DMR0		(MCF_MBAR + 0x50) /* DRAM 0 Mask reg (r/w) */
MCFSIM_DMR0        65 arch/m68k/include/asm/m523xsim.h #define	MCFSIM_DMR0		(MCF_IPSBAR + 0x4c)	/* Address mask 0 */
MCFSIM_DMR0        73 arch/m68k/include/asm/m525xsim.h #define MCFSIM_DMR0		(MCF_MBAR + 0x10c)	/* DRAM 0 Mask */
MCFSIM_DMR0        74 arch/m68k/include/asm/m527xsim.h #define	MCFSIM_DMR0		(MCF_IPSBAR + 0x4c)	/* Address mask 0 */
MCFSIM_DMR0        84 arch/m68k/include/asm/m527xsim.h #define	MCFSIM_DMR0		(MCF_IPSBAR + 0x54)	/* Address mask 0 */
MCFSIM_DMR0        65 arch/m68k/include/asm/m528xsim.h #define	MCFSIM_DMR0		(MCF_IPSBAR + 0x0000004c) /* Address mask 0 */
MCFSIM_DMR0        96 arch/m68k/include/asm/m5307sim.h #define MCFSIM_DMR0		(MCF_MBAR + 0x10c)	/* DRAM Mask 0 */
MCFSIM_DMR0        79 arch/m68k/include/asm/m5407sim.h #define MCFSIM_DMR0		(MCF_MBAR + 0x10c)	/* DRAM 0 Mask */