LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 3138 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 0x10
LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 3208 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 0x10
LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 3456 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 0x10
LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 9284 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT                                                           0x10
LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 7638 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 0x00000010
LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 3216 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 0x10
LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 40033 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT                                                           0x10
LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 48769 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT                                                           0x10
LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT 43267 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define LVTMA_PWRSEQ_REF_DIV__BL_PWM_REF_DIV__SHIFT                                                           0x10