LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT  201 drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_sh_mask.h #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x00000001
LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 3784 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_0_sh_mask.h #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x1
LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 5218 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x1
LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 5410 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x1
LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 4626 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x1
LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 5596 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_2_sh_mask.h #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x1
LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 5706 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_3_sh_mask.h #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x1
LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 2806 drivers/gpu/drm/amd/include/asic_reg/smu/smu_8_0_sh_mask.h #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x1