AZALIA_CRC0_CHANNEL1__CRC_CHANNEL1__SHIFT 13404 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define AZALIA_CRC0_CHANNEL1__CRC_CHANNEL1__SHIFT 0x0
AZALIA_CRC0_CHANNEL1__CRC_CHANNEL1__SHIFT 13410 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define AZALIA_CRC0_CHANNEL1__CRC_CHANNEL1__SHIFT 0x0
AZALIA_CRC0_CHANNEL1__CRC_CHANNEL1__SHIFT 14026 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define AZALIA_CRC0_CHANNEL1__CRC_CHANNEL1__SHIFT 0x0
AZALIA_CRC0_CHANNEL1__CRC_CHANNEL1__SHIFT 64410 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define AZALIA_CRC0_CHANNEL1__CRC_CHANNEL1__SHIFT                                                             0x0
AZALIA_CRC0_CHANNEL1__CRC_CHANNEL1__SHIFT 12146 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define AZALIA_CRC0_CHANNEL1__CRC_CHANNEL1__SHIFT 0x0
AZALIA_CRC0_CHANNEL1__CRC_CHANNEL1__SHIFT 47188 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define AZALIA_CRC0_CHANNEL1__CRC_CHANNEL1__SHIFT                                                             0x0
AZALIA_CRC0_CHANNEL1__CRC_CHANNEL1__SHIFT 60868 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define AZALIA_CRC0_CHANNEL1__CRC_CHANNEL1__SHIFT                                                             0x0
AZALIA_CRC0_CHANNEL1__CRC_CHANNEL1__SHIFT 49482 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define AZALIA_CRC0_CHANNEL1__CRC_CHANNEL1__SHIFT                                                             0x0