IH_RB_WPTR_ADDR_LO__ADDR__SHIFT  757 drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h #define IH_RB_WPTR_ADDR_LO__ADDR__SHIFT 0x00000002
IH_RB_WPTR_ADDR_LO__ADDR__SHIFT   86 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define IH_RB_WPTR_ADDR_LO__ADDR__SHIFT 0x2
IH_RB_WPTR_ADDR_LO__ADDR__SHIFT   90 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define IH_RB_WPTR_ADDR_LO__ADDR__SHIFT 0x2
IH_RB_WPTR_ADDR_LO__ADDR__SHIFT   90 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define IH_RB_WPTR_ADDR_LO__ADDR__SHIFT 0x2
IH_RB_WPTR_ADDR_LO__ADDR__SHIFT   92 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define IH_RB_WPTR_ADDR_LO__ADDR__SHIFT 0x2
IH_RB_WPTR_ADDR_LO__ADDR__SHIFT  239 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_1_sh_mask.h #define IH_RB_WPTR_ADDR_LO__ADDR__SHIFT                                                                       0x2
IH_RB_WPTR_ADDR_LO__ADDR__SHIFT  237 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_sh_mask.h #define IH_RB_WPTR_ADDR_LO__ADDR__SHIFT                                                                       0x2
IH_RB_WPTR_ADDR_LO__ADDR__SHIFT  239 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_5_0_0_sh_mask.h #define IH_RB_WPTR_ADDR_LO__ADDR__SHIFT                                                                       0x2