IH_RB_RPTR__OFFSET_MASK  752 drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h #define IH_RB_RPTR__OFFSET_MASK 0x0003fffcL
IH_RB_RPTR__OFFSET_MASK   77 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define IH_RB_RPTR__OFFSET_MASK 0x3fffc
IH_RB_RPTR__OFFSET_MASK   77 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define IH_RB_RPTR__OFFSET_MASK 0x3fffc
IH_RB_RPTR__OFFSET_MASK   77 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define IH_RB_RPTR__OFFSET_MASK 0x3fffc
IH_RB_RPTR__OFFSET_MASK   79 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define IH_RB_RPTR__OFFSET_MASK 0x3fffc
IH_RB_RPTR__OFFSET_MASK  225 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_1_sh_mask.h #define IH_RB_RPTR__OFFSET_MASK                                                                               0x0003FFFCL
IH_RB_RPTR__OFFSET_MASK  223 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_4_0_sh_mask.h #define IH_RB_RPTR__OFFSET_MASK                                                                               0x0003FFFCL
IH_RB_RPTR__OFFSET_MASK  225 drivers/gpu/drm/amd/include/asic_reg/oss/osssys_5_0_0_sh_mask.h #define IH_RB_RPTR__OFFSET_MASK                                                                               0x0003FFFCL