ICH_REG_           98 sound/pci/intel8x0.c 	ICH_REG_##name##_BDBAR	= base + 0x0,	/* dword - buffer descriptor list base address */ \
ICH_REG_           99 sound/pci/intel8x0.c 	ICH_REG_##name##_CIV	= base + 0x04,	/* byte - current index value */ \
ICH_REG_          100 sound/pci/intel8x0.c 	ICH_REG_##name##_LVI	= base + 0x05,	/* byte - last valid index */ \
ICH_REG_          101 sound/pci/intel8x0.c 	ICH_REG_##name##_SR	= base + 0x06,	/* byte - status register */ \
ICH_REG_          102 sound/pci/intel8x0.c 	ICH_REG_##name##_PICB	= base + 0x08,	/* word - position in current buffer */ \
ICH_REG_          103 sound/pci/intel8x0.c 	ICH_REG_##name##_PIV	= base + 0x0a,	/* byte - prefetched index value */ \
ICH_REG_          104 sound/pci/intel8x0.c 	ICH_REG_##name##_CR	= base + 0x0b,	/* byte - control register */ \
ICH_REG_           68 sound/pci/intel8x0m.c 	ICH_REG_##name##_BDBAR	= base + 0x0,	/* dword - buffer descriptor list base address */ \
ICH_REG_           69 sound/pci/intel8x0m.c 	ICH_REG_##name##_CIV	= base + 0x04,	/* byte - current index value */ \
ICH_REG_           70 sound/pci/intel8x0m.c 	ICH_REG_##name##_LVI	= base + 0x05,	/* byte - last valid index */ \
ICH_REG_           71 sound/pci/intel8x0m.c 	ICH_REG_##name##_SR	= base + 0x06,	/* byte - status register */ \
ICH_REG_           72 sound/pci/intel8x0m.c 	ICH_REG_##name##_PICB	= base + 0x08,	/* word - position in current buffer */ \
ICH_REG_           73 sound/pci/intel8x0m.c 	ICH_REG_##name##_PIV	= base + 0x0a,	/* byte - prefetched index value */ \
ICH_REG_           74 sound/pci/intel8x0m.c 	ICH_REG_##name##_CR	= base + 0x0b,	/* byte - control register */ \