AUX_SW_STATUS__AUX_SW_RX_MIN_COUNT_VIOL_MASK 8963 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define AUX_SW_STATUS__AUX_SW_RX_MIN_COUNT_VIOL_MASK 0x1000
AUX_SW_STATUS__AUX_SW_RX_MIN_COUNT_VIOL_MASK 8661 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define AUX_SW_STATUS__AUX_SW_RX_MIN_COUNT_VIOL_MASK 0x1000
AUX_SW_STATUS__AUX_SW_RX_MIN_COUNT_VIOL_MASK 9947 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define AUX_SW_STATUS__AUX_SW_RX_MIN_COUNT_VIOL_MASK 0x1000
AUX_SW_STATUS__AUX_SW_RX_MIN_COUNT_VIOL_MASK  768 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define AUX_SW_STATUS__AUX_SW_RX_MIN_COUNT_VIOL_MASK 0x00001000L
AUX_SW_STATUS__AUX_SW_RX_MIN_COUNT_VIOL_MASK 9479 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define AUX_SW_STATUS__AUX_SW_RX_MIN_COUNT_VIOL_MASK 0x1000