AUX_DPHY_TX_REF_CONTROL__AUX_TX_REF_SEL_MASK 9035 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define AUX_DPHY_TX_REF_CONTROL__AUX_TX_REF_SEL_MASK 0x1
AUX_DPHY_TX_REF_CONTROL__AUX_TX_REF_SEL_MASK 8733 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define AUX_DPHY_TX_REF_CONTROL__AUX_TX_REF_SEL_MASK 0x1
AUX_DPHY_TX_REF_CONTROL__AUX_TX_REF_SEL_MASK 10019 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define AUX_DPHY_TX_REF_CONTROL__AUX_TX_REF_SEL_MASK 0x1
AUX_DPHY_TX_REF_CONTROL__AUX_TX_REF_SEL_MASK  638 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define AUX_DPHY_TX_REF_CONTROL__AUX_TX_REF_SEL_MASK 0x00000001L
AUX_DPHY_TX_REF_CONTROL__AUX_TX_REF_SEL_MASK 9551 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define AUX_DPHY_TX_REF_CONTROL__AUX_TX_REF_SEL_MASK 0x1