AUXN_IMPCAL__AUXN_IMPCAL_VALUE__SHIFT 3030 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define AUXN_IMPCAL__AUXN_IMPCAL_VALUE__SHIFT 0x10
AUXN_IMPCAL__AUXN_IMPCAL_VALUE__SHIFT 3100 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define AUXN_IMPCAL__AUXN_IMPCAL_VALUE__SHIFT 0x10
AUXN_IMPCAL__AUXN_IMPCAL_VALUE__SHIFT 3340 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define AUXN_IMPCAL__AUXN_IMPCAL_VALUE__SHIFT 0x10
AUXN_IMPCAL__AUXN_IMPCAL_VALUE__SHIFT 9573 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define AUXN_IMPCAL__AUXN_IMPCAL_VALUE__SHIFT                                                                 0x10
AUXN_IMPCAL__AUXN_IMPCAL_VALUE__SHIFT  719 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define AUXN_IMPCAL__AUXN_IMPCAL_VALUE__SHIFT 0x00000010
AUXN_IMPCAL__AUXN_IMPCAL_VALUE__SHIFT 3046 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define AUXN_IMPCAL__AUXN_IMPCAL_VALUE__SHIFT 0x10
AUXN_IMPCAL__AUXN_IMPCAL_VALUE__SHIFT 40235 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define AUXN_IMPCAL__AUXN_IMPCAL_VALUE__SHIFT                                                                 0x10