HUBP1_DCHUBP_CNTL__HUBP_UNDERFLOW_STATUS_MASK 10146 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define HUBP1_DCHUBP_CNTL__HUBP_UNDERFLOW_STATUS_MASK                                                         0x70000000L
HUBP1_DCHUBP_CNTL__HUBP_UNDERFLOW_STATUS_MASK 10464 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define HUBP1_DCHUBP_CNTL__HUBP_UNDERFLOW_STATUS_MASK                                                         0x70000000L
HUBP1_DCHUBP_CNTL__HUBP_UNDERFLOW_STATUS_MASK 10061 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define HUBP1_DCHUBP_CNTL__HUBP_UNDERFLOW_STATUS_MASK                                                         0x70000000L