HHI_VID_PLL_CLK_DIV 70 drivers/clk/meson/axg.h #define HHI_VID_PLL_CLK_DIV 0x1a0 HHI_VID_PLL_CLK_DIV 69 drivers/clk/meson/g12a.h #define HHI_VID_PLL_CLK_DIV 0x1A0 HHI_VID_PLL_CLK_DIV 52 drivers/clk/meson/gxbb.h #define HHI_VID_PLL_CLK_DIV 0x1a0 /* 0x68 offset in data sheet */ HHI_VID_PLL_CLK_DIV 50 drivers/gpu/drm/meson/meson_vclk.c #define HHI_VID_PLL_CLK_DIV 0x1a0 /* 0x68 offset in data sheet */