HHI_GP0_PLL_CNTL   20 drivers/clk/meson/axg.h #define HHI_GP0_PLL_CNTL		0x40
HHI_GP0_PLL_CNTL   20 drivers/clk/meson/gxbb.h #define HHI_GP0_PLL_CNTL		0x40 /* 0x10 offset in data sheet */