HDP_XDP_P2P_BAR4__FLUSH__SHIFT  479 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_4_0_sh_mask.h #define HDP_XDP_P2P_BAR4__FLUSH__SHIFT	0x10
HDP_XDP_P2P_BAR4__FLUSH__SHIFT  536 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_5_0_0_sh_mask.h #define HDP_XDP_P2P_BAR4__FLUSH__SHIFT                                                                        0x10
HDP_XDP_P2P_BAR4__FLUSH__SHIFT  587 drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h #define HDP_XDP_P2P_BAR4__FLUSH__SHIFT 0x00000010
HDP_XDP_P2P_BAR4__FLUSH__SHIFT 2408 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define HDP_XDP_P2P_BAR4__FLUSH__SHIFT 0x10
HDP_XDP_P2P_BAR4__FLUSH__SHIFT 2476 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define HDP_XDP_P2P_BAR4__FLUSH__SHIFT 0x10
HDP_XDP_P2P_BAR4__FLUSH__SHIFT 3490 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define HDP_XDP_P2P_BAR4__FLUSH__SHIFT 0x10
HDP_XDP_P2P_BAR4__FLUSH__SHIFT 3592 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define HDP_XDP_P2P_BAR4__FLUSH__SHIFT 0x10