HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_EN__SHIFT  430 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_4_0_sh_mask.h #define HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_EN__SHIFT	0x0
HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_EN__SHIFT  487 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_5_0_0_sh_mask.h #define HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_EN__SHIFT                                                         0x0
HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_EN__SHIFT  557 drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h #define HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_EN__SHIFT 0x00000000
HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_EN__SHIFT 2348 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_EN__SHIFT 0x0
HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_EN__SHIFT 2416 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_EN__SHIFT 0x0
HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_EN__SHIFT 3430 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_EN__SHIFT 0x0
HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_EN__SHIFT 3532 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define HDP_XDP_HST_CFG__HST_CFG_WR_COMBINE_EN__SHIFT 0x0