HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT  522 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_4_0_sh_mask.h #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT	0x10
HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT  579 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_5_0_0_sh_mask.h #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT                                                                      0x10
HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT  407 drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT 0x00000010
HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT 2444 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT 0x10
HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT 2512 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT 0x10
HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT 3526 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT 0x10
HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT 3628 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define HDP_XDP_CHKN__CHKN_2_RSVD__SHIFT 0x10