HDP_XDP_CHKN__CHKN_0_RSVD__SHIFT  520 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_4_0_sh_mask.h #define HDP_XDP_CHKN__CHKN_0_RSVD__SHIFT	0x0
HDP_XDP_CHKN__CHKN_0_RSVD__SHIFT  577 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_5_0_0_sh_mask.h #define HDP_XDP_CHKN__CHKN_0_RSVD__SHIFT                                                                      0x0
HDP_XDP_CHKN__CHKN_0_RSVD__SHIFT  403 drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h #define HDP_XDP_CHKN__CHKN_0_RSVD__SHIFT 0x00000000
HDP_XDP_CHKN__CHKN_0_RSVD__SHIFT 2440 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define HDP_XDP_CHKN__CHKN_0_RSVD__SHIFT 0x0
HDP_XDP_CHKN__CHKN_0_RSVD__SHIFT 2508 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define HDP_XDP_CHKN__CHKN_0_RSVD__SHIFT 0x0
HDP_XDP_CHKN__CHKN_0_RSVD__SHIFT 3522 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define HDP_XDP_CHKN__CHKN_0_RSVD__SHIFT 0x0
HDP_XDP_CHKN__CHKN_0_RSVD__SHIFT 3624 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define HDP_XDP_CHKN__CHKN_0_RSVD__SHIFT 0x0