HDP_MMHUB_TLVL__XDP_MBX_WR_TLVL__SHIFT   31 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_4_0_sh_mask.h #define HDP_MMHUB_TLVL__XDP_MBX_WR_TLVL__SHIFT	0x10
HDP_MMHUB_TLVL__XDP_MBX_WR_TLVL__SHIFT   31 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_5_0_0_sh_mask.h #define HDP_MMHUB_TLVL__XDP_MBX_WR_TLVL__SHIFT                                                                0x10