HDP_MEMIO_CNTL__MEMIO_BE__SHIFT  170 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_4_0_sh_mask.h #define HDP_MEMIO_CNTL__MEMIO_BE__SHIFT	0x2
HDP_MEMIO_CNTL__MEMIO_BE__SHIFT  227 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_5_0_0_sh_mask.h #define HDP_MEMIO_CNTL__MEMIO_BE__SHIFT                                                                       0x2
HDP_MEMIO_CNTL__MEMIO_BE__SHIFT  245 drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h #define HDP_MEMIO_CNTL__MEMIO_BE__SHIFT 0x00000002
HDP_MEMIO_CNTL__MEMIO_BE__SHIFT 2152 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define HDP_MEMIO_CNTL__MEMIO_BE__SHIFT 0x2
HDP_MEMIO_CNTL__MEMIO_BE__SHIFT 2220 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define HDP_MEMIO_CNTL__MEMIO_BE__SHIFT 0x2
HDP_MEMIO_CNTL__MEMIO_BE__SHIFT 3226 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define HDP_MEMIO_CNTL__MEMIO_BE__SHIFT 0x2
HDP_MEMIO_CNTL__MEMIO_BE__SHIFT 3328 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define HDP_MEMIO_CNTL__MEMIO_BE__SHIFT 0x2