HDP_HOST_PATH_CNTL__REG_CLK_ENABLE_COUNT__SHIFT  229 drivers/gpu/drm/amd/include/asic_reg/oss/oss_1_0_sh_mask.h #define HDP_HOST_PATH_CNTL__REG_CLK_ENABLE_COUNT__SHIFT 0x00000018
HDP_HOST_PATH_CNTL__REG_CLK_ENABLE_COUNT__SHIFT 2014 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_0_sh_mask.h #define HDP_HOST_PATH_CNTL__REG_CLK_ENABLE_COUNT__SHIFT 0x18
HDP_HOST_PATH_CNTL__REG_CLK_ENABLE_COUNT__SHIFT 2082 drivers/gpu/drm/amd/include/asic_reg/oss/oss_2_4_sh_mask.h #define HDP_HOST_PATH_CNTL__REG_CLK_ENABLE_COUNT__SHIFT 0x18
HDP_HOST_PATH_CNTL__REG_CLK_ENABLE_COUNT__SHIFT 3084 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_1_sh_mask.h #define HDP_HOST_PATH_CNTL__REG_CLK_ENABLE_COUNT__SHIFT 0x18
HDP_HOST_PATH_CNTL__REG_CLK_ENABLE_COUNT__SHIFT 3186 drivers/gpu/drm/amd/include/asic_reg/oss/oss_3_0_sh_mask.h #define HDP_HOST_PATH_CNTL__REG_CLK_ENABLE_COUNT__SHIFT 0x18