HDP_EDC_CNT__MEM1_SED_COUNT__SHIFT  144 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_4_0_sh_mask.h #define HDP_EDC_CNT__MEM1_SED_COUNT__SHIFT	0x2
HDP_EDC_CNT__MEM1_SED_COUNT__SHIFT  193 drivers/gpu/drm/amd/include/asic_reg/hdp/hdp_5_0_0_sh_mask.h #define HDP_EDC_CNT__MEM1_SED_COUNT__SHIFT                                                                    0x2