GPLR               31 arch/arm/mach-pxa/mfp-pxa2xx.c #define GPLR(x)		__REG2(0x40E00000, BANK_OFF((x) >> 5))
GPLR             1105 arch/arm/mach-sa1100/include/mach/SA-1100.h #define GPLR		__REG(0x90040000)  /* GPIO Pin Level Reg.             */
GPLR               44 drivers/gpio/gpio-intel-mid.c 	GPLR = 0,	/* pin level read-only */
GPLR               19 drivers/gpio/gpio-merrifield.c #define GPLR		0x004	/* pin level r/o */