GMCON_PGFSM_WRITE__WRITE_VALUE__SHIFT  395 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_6_0_sh_mask.h #define GMCON_PGFSM_WRITE__WRITE_VALUE__SHIFT 0x00000000
GMCON_PGFSM_WRITE__WRITE_VALUE__SHIFT 5232 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_0_sh_mask.h #define GMCON_PGFSM_WRITE__WRITE_VALUE__SHIFT 0x0
GMCON_PGFSM_WRITE__WRITE_VALUE__SHIFT 5872 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_7_1_sh_mask.h #define GMCON_PGFSM_WRITE__WRITE_VALUE__SHIFT 0x0
GMCON_PGFSM_WRITE__WRITE_VALUE__SHIFT 6468 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_1_sh_mask.h #define GMCON_PGFSM_WRITE__WRITE_VALUE__SHIFT 0x0
GMCON_PGFSM_WRITE__WRITE_VALUE__SHIFT 6346 drivers/gpu/drm/amd/include/asic_reg/gmc/gmc_8_2_sh_mask.h #define GMCON_PGFSM_WRITE__WRITE_VALUE__SHIFT 0x0